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general description the max1820/max1821 low-dropout, pulse-width-mod-ulated (pwm) dc-dc buck regulators are optimized to provide power to the power amplifier (pa) in wcdma cell phones; however, they may be applied in many other applications where high efficiency is a priority. the supply voltage range is from 2.6v to 5.5v, and the guar- anteed output current is 600ma; 1mhz pwm switching allows for small external components, while skip mode reduces quiescent current to 180? with light loads. the max1820 is dynamically controlled to provide vary- ing output voltages from 0.4v to 3.4v. the circuit is designed such that the output voltage settles in <30? for a full-scale change in voltage and current. the max1821 is set with external resistors to provide any fixed output voltage in the 1.25v to 5.5v range. the max1820/max1821 include a low on-resistance internal mosfet switch and synchronous rectifier to maximize efficiency and minimize external component count; 100% duty-cycle operation allows for low dropout of only 150mv at 600ma load, including the external inductor resistance. the devices are offered in 10-pin ?ax and tiny 3 ? 4 chip-scale (ucsp) packages. ________________________applications wcdma cell phone power amplifierspda, palmtop, and notebook computers microprocessor core supplies digital cameras pcmcia and network cards hand-held instruments features ? dynamically adjustable output from 0.4v to 3.4v(max1820) ? programmable output from 1.25v to 5.5v(max1821) ? sync to 13mhz external clock (max1820x) ? sync to 19.8mhz external clock (max1820y) ? no sync, internal 1mhz oscillator (max1820z) ? low quiescent current 180? (typ) in skip mode0.1? (typ) in shutdown mode ? no external schottky diode required ? 600ma guaranteed output current ? 0% to 100% duty-cycle operation ? 150mv dropout at 600ma load (including r dc of external inductor) ? ?ax or ucsp packaging max1820/max1821 wcdma cellular phone 600ma buck regulators ________________________________________________________________ maxim integrated products 1 19-2011; rev 3; 4/05 evaluation kit available ordering information part sync freq (mhz) output voltage temp range pin-package ucsp mark max1820 zebc* no sync dynamic -40? to +85? 3 ? 4 ucsp aab MAX1820YEBC* 19.8 dynamic -40? to +85? 3 ? 4 ucsp aal max1820xebc* 13 dynamic -40? to +85? 3 ? 4 ucsp aam max1820zeub no sync dynamic -40? to +85? 10 ?ax max1820yeub 19.8 dynamic -40? to +85? 10 ?ax max1820xeub 13 dynamic -40? to +85? 10 ?ax for pricing, delivery, and ordering information, please contact maxim/dallas direct! at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. pin configurations appear at end of data sheet. typical operating circuits continued at end of data sheet. sync gnd shdn batt pgnd comp v out control dac ref lx out 13mhz or 19.8mhz max1820 skip 4.7 h 4.7 f input 2.6v to 5.5v dynamicoutput 0.4v to 3.4v typical operating circuits *ucsp reliability is integrally linked to the user? assembly methods, circuit board material, and environment. see the ucsp re liability notice in the ucsp reliability section of this data sheet for more information. ucsp is a trademark of maxim integrated products, inc. max is a registered trademark of maxim integrated products, inc. ordering information continued at end of data sheet. downloaded from: http:///
max1820/max1821 wcdma cellular phone 600mabuck regulators 2 _______________________________________________________________________________________ absolute maximum ratings stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. batt, out (fb), shdn , sync, skip , ref to gnd .......................................................-0.3v to +6.0v pgnd to gnd .......................................................-0.3v to +0.3v lx, comp to gnd...................................-0.3v to (v batt + 0.3v) output short-circuit duration ............................................infinite continuous power dissipation (t a = +70?) 3 ? 4 ucsp (derate 10.4mw/? above +70?)............832mw 10-pin ?ax (derate 5.6mw/? above +70?) ...........444mw operating temperature range ...........................-40? to +85? junction temperature ......................................................+150? storage temperature ranges 3 ? 4 ucsp ....................................................-40? to +150? 10-pin ?ax ..................................................-65? to +150? solder profile (ucsp) ......................................................(note 1) lead temperature (soldering, 10s) .................................+300? parameter symbol conditions min typ max units input batt voltage v in 2.6 5.5 v undervoltage lockoutthreshold v uvlo v batt rising, 1% hysteresis 2.20 2.35 2.55 v skip = gnd (max1820z/max1821) 180 300 skip = batt, no switching 450 2000 skip = gnd (max1820y, max1820x, and max1821x) 240 360 quiescent current i q skip = batt, 1mhz switching 3300 ? skip = gnd 530 1000 quiescent current in dropout skip = batt, no switching 550 1000 ? shutdown supply current i shdn shdn = gnd 0.1 6 a error amplifier v ref = 1.932 0.005v, load = 0 to 600ma, skip = batt or gnd 3.33 3.4 3.47 out voltage accuracy(max1820) v out v ref = 0.227 0.005v, load = 0 to 30ma, skip = batt, v batt 4.2v 0.35 0.40 0.45 v out input resistance(max1820) r out 250 400 k ? ref input current (max1820) i ref 0.1 1 ? fb voltage accuracy(max1821) v fb fb = comp 1.225 1.25 1.275 v fb input current (max1821) i fb v fb = 1.4v 0.01 50 na transconductance g m 30 50 85 ? comp clamp low voltage 0.2 0.45 1.0 v comp clamp high voltage 2.04 2.15 2.28 v electrical characteristics(v batt = 3.6v, shdn = batt, skip = sync = gnd, v ref = 1.25v (max1820 only), t a = 0? to +85? , unless otherwise noted. typical values are at t a = +25?.) (note 2) note 1: for ucsp solder profile information, visit www.maxim-ic.com/1st_pages/ucsp.htm. downloaded from: http:///
max1820/max1821 wcdma cellular phone 600ma buck regulators _______________________________________________________________________________________ 3 parameter symbol conditions min typ max units controller i lx = 180ma, v batt = 3.6v 0.15 0.3 p-channel on-resistance p rds i lx = 180ma, v batt = 2.6v 0.2 i lx = 180ma, v batt = 3.6v 0.2 0.35 n-channel on-resistance n rds i lx = 180ma, v batt = 2.6v 0.3 current-sense transresistance r cs 0.25 0.50 0.75 v/a p-channel current-limitthreshold duty factor = 100% 0.75 1.2 1.55 a p-channel pulse-skippingcurrent threshold skip = gnd 0.04 0.13 0.24 a skip = batt -1.6 -0.85 -0.45 n-channel current-limitthreshold skip = gnd 0.02 0.08 0.14 a lx leakage current i lx v batt = 5.5v, lx = gnd or batt -1 0.1 1 a maximum duty cycle duty max 100 % skip = gnd 0 minimum duty cycle duty min skip = batt, v batt = 4.2v p-p 10 % sync and oscillator s y n c = si ne w ave, s y n c i np ut = 200m v p-p 13 13 sync divide ratio(max1820x) s y n c = si ne w ave, s y n c i np ut = 800m v p-p 13 13 hz/hz sync capture range(max1820x) sync = sine wave, ac-coupled,sync input = 500mv p-p 10 13 16 mhz v sync = 1v (max1820z, max1821) -1 +1 sync leakage currentfrequency i sync v sync = 1v (max1820x, max1820y, and max1821x) -5 +5 ? s y n c = si ne w ave, s y n c i np ut = 200m v p-p 18 18 sync divide ratio(max1820y) s y n c = si ne w ave, s y n c i np ut = 800m v p-p 18 18 hz/hz sync capture range(max1820y) sync = sine wave, ac-coupled,sync input = 500mv p-p 15 19.8 21 mhz internal oscillator frequency(max1820z, max1821) f osc sync = gnd 0.8 1 1.2 mhz logic inputs ( skip , shdn) logic input high v ih 1.6 v logic input low v il 0.4 v logic input current -1 0.1 1 ? electrical characteristics (continued)(v batt = 3.6v, shdn = batt, skip = sync = gnd, v ref = 1.25v (max1820 only), t a = 0? to +85? , unless otherwise noted. typical values are at t a = +25?.) (note 2) downloaded from: http:///
max1820/max1821 wcdma cellular phone 600mabuck regulators 4 _______________________________________________________________________________________ parameter symbol conditions min max units input batt voltage v in 2.6 5.5 v undervoltage lockoutthreshold v uvlo v batt rising, 1% hysteresis 2.15 2.55 v skip = gnd (max1820z, max1821) 300 skip = gnd (max1820x, max1820y, and max1821x) 360 quiescent current i q skip = batt, no switching 2000 ? skip = gnd 1000 quiescent current in dropout skip = batt, no switching 1000 ? shutdown supply current i shdn shdn = gnd 6 a error amplifier v ref = 1.932 ?.005v, load = 0 to 600ma, skip = batt or gnd 3.33 3.47 out voltage accuracy(max1820) v out v ref = 0.227 ?.005v, load = 0 to 30ma, skip = batt, v batt 4.2v 0.35 0.45 v out input resistance(max1820) r out 250 k ? ref input current (max1820) i ref 1 a fb voltage accuracy(max1821) v fb fb = comp 1.225 1.275 v fb input current (max1821) i fb v fb = 1.4v 50 na transconductance g m 30 85 ? comp clamp low voltage 0.2 1.0 v comp clamp high voltage 2.04 2.28 v controller p-channel on-resistance p rds i lx = 180ma, v batt = 3.6v 0.3 ? n-channel on-resistance n rds i lx = 180ma, v batt = 3.6v 0.35 ? current-sense transresistance r cs 0.25 0.75 v/a p-channel current-limitthreshold duty factor = 100% 0.75 1.55 a p-channel pulse-skippingcurrent threshold skip = gnd 0.04 0.24 a skip = batt -1.6 -0.45 n-channel current-limitthreshold skip = gnd 0.01 0.14 a electrical characteristics(v batt = 3.6v, shdn = batt, skip = sync = gnd, v ref = 1.25v (max1820 only), t a = -40? to +85? , unless otherwise noted.) (notes 2, 3) downloaded from: http:///
max1820/max1821 wcdma cellular phone 600ma buck regulators _______________________________________________________________________________________ 5 note 2: limits are 100% production tested at t a = +25? for ucsp parts. limits over the entire operating temperature range are guaranteed by design and characterization but are not production tested. note 3: specifications to -40? are guaranteed by design and not subject to production test. parameter symbol conditions min max units lx leakage current i lx v batt = 5.5v, lx = gnd or batt -1 1 a maximum duty cycle duty max 100 % skip = gnd 0 minimum duty cycle duty min skip = batt, v batt = 4.2v 10 % sync and oscillator s y n c = si ne w ave, s y n c i np ut = 200m v p-p 13 13 sync divide ratio(max1820x) s y n c = si ne w ave, s y n c i np ut = 800m v p-p 13 13 hz/hz sync capture range(max1820x) sync = sine wave, ac-coupled,sync input = 500mv p-p 10 16 mhz s y n c = si ne w ave, s y n c i np ut = 200m v p-p 18 18 sync divide ratio(max1820y) s y n c = si ne w ave, s y n c i np ut = 800m v p-p 18 18 hz/hz sync capture range(max1820y) sync = sine wave, ac-coupled,sync input = 500mv p-p 15 21 mhz v sync = iv ( m ax 1820z , m ax 1821) -1 +1 sync leakage current i sync v sync = iv ( m ax 1820x , m ax 1820y , and m ax 1821x ) -5 +5 ? internal oscillator frequency(max1820z, max1821) f osc sync = gnd 0.8 1.2 mhz logic inputs ( skip , shdn) logic input high v ih 1.6 v logic input low v il 0.4 v logic input current 1 a electrical characteristics (continued)(v batt = 3.6v, shdn = batt, skip = sync = gnd, v ref = 1.25v (max1820 only), t a = -40? to +85? , unless otherwise noted.) (notes 2, 3) 40 50 60 70 80 90 100 01 . 0 0.5 1.5 2.0 2.5 3.0 3.5 4.0 efficiency vs. output voltage (normal mode, v in = 3.6v) max1820/21 toc01 output voltage (v) efficiency (%) r load = 10 ? r load = 15 ? r load = 5 ? 40 50 60 70 80 90 100 01 . 0 0.5 1.5 2.0 2.5 3.0 3.5 4.0 efficiency vs. output voltage (pwm mode, v in = 3.6v) max1820/21 toc02 output voltage (v) efficiency (%) r load = 10 ? r load = 15 ? r load = 5 ? 0 2010 4030 6050 70 9080 100 2.0 3.0 3.5 2.5 4.0 4.5 5.0 5.5 6.0 max1820/21 toc03 v in (v) efficiency (%) efficiency vs. input voltage normal mode, r load = 10 ? v out = 1.8v v out = 3.4v v out = 0.4v typical operating characteristics (t a = +25?, unless otherwise noted.) downloaded from: http:///
max1820/max1821 wcdma cellular phone 600mabuck regulators 6 _______________________________________________________________________________________ typical operating characteristics (continued) (t a = +25?, unless otherwise noted.) 90 0 1 1000 100 10 max1821 efficiency vs. load current (v out = 3.3v) 3010 7050 100 4020 8060 max1820/21 toc04 load current (ma) efficiency (%) v in = 5.0v v in = 3.6v v in = 5.0v skip = gnd (dashed line)skip = batt (solid line) v in = 3.6v 90 0 1 1000 100 10 max1821 efficiency vs. load current (v out = 2.5v) 3010 7050 100 4020 8060 max1820/21 toc05 load current (ma) efficiency (%) v in = 5.0v v in = 3.6v v in = 3.6v v in = 5.0v skip = gnd (dashed line)skip = batt (solid line) v in = 2.7v v in = 2.7v 90 0 1 1000 100 10 max1821 efficiency vs. load current (v out = 1.5v) 3010 7050 100 4020 8060 max1820/21 toc06 load current (ma) efficiency (%) v in = 5.0v v in = 3.6v skip = gnd (dashed line)skip = batt (solid line) v in = 2.7v 0 4020 8060 120100 140 0 200 300 100 400 500 600 dropout voltage vs. load current max1820/21 toc07 load current (ma) dropout voltage (mv) v out = 3.4v rl = 57m ? 0 21 54 3 87 6 9 2.0 3.0 3.5 2.5 4.0 4.5 5.0 5.5 supply current vs. supply voltage max1820/21 toc08 supply voltage (v) supply current (ma) v out = 1.5v skip = batt 20 8060 40 120100 200180 160 140 220 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 supply current vs. supply voltage max1820/21 toc09 supply voltage (v) supply current ( a) v out = 1.5v skip = gnd max1820/21 toc10 b c a 400ns/div a: v lx , 5v/div b: inductor current, 500ma/divc: v out (ac-coupled), 5mv/div heavy-load switching waveforms (v in = 3.8v, v out = 3.4v, i load = 600ma, skip = batt) max1820/21 toc11 b c a 400ns/div a: v lx , 5v/div b: inductor current, 500ma/divc: v out (ac-coupled), 5mv/div medium-load switching waveforms (v in = 3.8v, v out = 1.8v, i load = 300ma, skip = batt) max1820/21 toc12 b c a 400ns/div a: v lx , 5v/div b: inductor current, 100ma/divc: v out (ac-coupled), 5mv/div light-load pwm switching waveforms (v in = 3.8v, v out = 0.45v, i load = 30ma, skip = batt) downloaded from: http:///
max1820/max1821 wcdma cellular phone 600ma buck regulators _______________________________________________________________________________________ 7 max1820/21 toc13 b c a 2 s/div a: v lx , 5v/div b: inductor current, 500ma/divc: v out (ac-coupled), 20mv/div light-load skip-switching waveforms (v in = 4.2v, v out = 1.5v, load = 30ma, skip = gnd) max1820/21 toc14 2ms/div exiting and entering shutdown (v in = 3.6v, v out = 3.4v, r load = 15 ? ) v out 2v/div i batt 0.5a/div v shdn 5v/div max1820/21 toc15 40 s/div load transient (i load = 20ma to 420ma, v out = 1.5v, v in = 3.6v, skip = batt) i out 200ma/div v out ac-coupled 100mv/div c out = 10 f max1820/21 toc16 40 s/div load transient (i load = 20ma to 420ma, v out = 1.5v, v in = 3.6v, skip = gnd) i out 200ma/div v out ac-coupled 100mv/div c out = 10 f max1820/21 toc17 20 s/div max1820 ref transient (v ref = 0.23v to 1.932v, r load = 10 ? , v in = 3.6v, skip = batt) v ref 1v/div v out 1v/div max1820/21 toc18 40 s/div line transient (v in = 3.6v to 4.0v, v out = 1.5v, i load = 300ma) v in 200mv/div v out ac-coupled 20mv/div c out = 10 f typical operating characteristics (continued) (t a = +25?, unless otherwise noted.) downloaded from: http:///
max1820/max1821 wcdma cellular phone 600mabuck regulators 8 _______________________________________________________________________________________ 0.1 1 10 output switching harmonics vs. frequency (v in = 3.8v, v out = 3.4v, i load = 600ma) max1820/21 toc19 frequency (mhz) harmonics (mv rms ) 1.61.2 0.8 0.4 0 0.1 1 10 output switching harmonics vs. frequency (v in = 3.8v, v out = 1.8v, i load = 300ma) max1820/21 toc20 frequency (mhz) harmonics (mv rms ) 0 0.80.4 1.61.2 pin description pin max1820 ucsp max1820 ?ax max1821 ucsp max1821 ?ax name function a1 1 a1 1 skip pwm/skip-mode input. drive with logic 0 to use pwm at mediumand heavy loads and pulse skipping at light loads. drive with logic 1 to force pwm at all loads. a2 2 a2 2 comp compensation. typically, connect an 82k ? (for max1821) or 43k ? (for max1820) series resistor and 330pf capacitor from this pin to gnd to stabilize the regulator. a3 3 out output voltage sense input. connect out directly to the output. 0.1 1 10 output switching harmonics vs. frequency (v in = 4.2v, v out = 0.4v, i load = 30ma) max1820/21 toc21 frequency (mhz) harmonics (mv rms ) 0 0.80.4 1.61.2 frequency (mhz) output noise (v in = 3.6v, v out = 1.8v, i out = 300ma) 4.03.0 1.0 2.0 max1820/21 toc22 0 0.1 1 10 100 250 noise ( v/ hz) typical operating characteristics (continued) (t a = +25?, unless otherwise noted.) downloaded from: http:///
max1820/max1821 wcdma cellular phone 600ma buck regulators _______________________________________________________________________________________ 9 _______________detailed description the max1820/max1821 pwm step-down dc-dc con-verters are optimized for low-voltage, battery-powered applications where high efficiency and small size are priorities. the max1821 is a general-purpose device that uses external feedback resistors to set the output voltage from 1.25v to v batt , and the max1820 is specifically intended to power a linear pa in wcdmahandsets. an analog control signal dynamically adjusts the max1820? output voltage from 0.4v to 3.4v with a settling time <30?. the max1820/max1821 operate at a high 1mhz switching frequency that reduces external component size. each device includes an internal synchronous rec- tifier that provides for high efficiency and eliminates the need for an external schottky diode. the normal operat- ing mode uses constant-frequency pwm switching at medium and heavy loads, and automatically pulse skips at light loads to reduce supply current and extend battery life. an additional forced pwm mode (withoptional external synchronization) switches at a con- stant frequency, regardless of load, to provide a well- controlled spectrum in noise-sensitive applications. battery life is maximized by low-dropout operation at 100% duty-cycle and a 0.1? (typ) logic-controlled shutdown mode. pwm control the max1820/max1821 use a slope-compensated,current-mode pwm controller capable of achieving 100% duty cycle. the current-mode control design is capable of minimum duty cycles of less than 10%, ensuring a constant switching frequency with outputs as low as 0.4v when powered from a single lithium-ion (li+) cell. current-mode feedback provides stable switching and cycle-by-cycle current limiting for superi- or load and line response and protection of the internal mosfet and synchronous rectifier. the output voltage is regulated by switching at a constant frequency and then modulating the power transferred to the load dur- pin description (continued) pin max1820 ucsp max1820 ?ax max1821 ucsp max1821 ?ax name function a3 3 fb output feedback sense input. to set the output voltage,connect fb to the center of an external resistive divider between the output and gnd. fb voltage regulates to 1.25v. a4 4 ref external reference input. connect ref to the output of a d/aconverter for dynamic adjustment of the output voltage. ref-to- out gain is 1.76. a4 4 ref internal reference bypass. connect a 0.047? capacitor fromref to gnd. b4 5 b4 5 gnd ground c4 6 c4 6 pgnd power ground c3 7 c3 7 lx inductor connection. lx connects to the drains of the internal power mosfets. lx is high impedance in shutdown mode. c2 8 c2 8 batt supply voltage input. connect batt to a 2.6v to 5.5v source.bypass batt to pgnd with a low-esr 10? capacitor. c1 9 c1 9 shdn active-low, shutdown control input b1 10 b1 10 sync clock synchronization input. drive sync with a 13mhz(max1820x, max1821x) or 19.8mhz (max1820y) ac-coupled sine-wave input to synchronize power switching at 1mhz. max1820z and max1821 do not have sync capability. connect sync to gnd to use the internally generated, free-running 1mhz clock. max1820z and max1821 sync pin must be connected to gnd. downloaded from: http:///
max1820/max1821 wcdma cellular phone 600mabuck regulators 10 ______________________________________________________________________________________ ing each cycle, using the pwm comparator. the powertransferred to the load is adjusted by changes in the inductor peak current limit during the first half of each cycle, based on the output error voltage. a new cycle begins at each falling edge of the internal oscillator. the controller turns on the p-channel mos- fet to increase the inductor current, and the slope compensation block initiates a new reference current ramp that is summed with the internal p-channel mos-fet current (figures 1 and 2). the second half of the cycle begins when the reference ramp is greater than the error voltage. the p-channel mosfet is turned off, the synchronous rectifier is turned on, and inductor current continues to flow to the output capacitor. the output capacitor stores charge when the current is high and releases it when the inductor current is low, smoothing the voltage across voltage reference pwm control and skip logic error signal slope comp current sense skip threshold transimpedance error amp max1820 skip comparator pwm comparator lx pgnd 13 or 18 1.25v toic bias 0.45v to 2.15v 1mhz oscillator clamp comp sync skip shdn gnd battout ref figure 1. max1820 simplified functional diagram (no sync for max1820z) voltage reference pwm control and skip logic error signal slope comp current sense skip threshold transimpedance error amp max1821 skip comparator pwm comparator lx pgnd 1.25v toic bias 0.45v to 2.15v 1mhz oscillator clamp comp sync skip shdn gnd battout ref figure 2. max1821 simplified functional diagram (no sync for max1821) downloaded from: http:///
max1820/max1821 wcdma cellular phone 600ma buck regulators ______________________________________________________________________________________ 11 the load. the duty cycle of a buck step-down converteris ideally a ratio of the output voltage to input voltage in steady-state condition. the max1820/max1821 have internal switch current limits of 1.2a (typ). if i lx exceeds this maximum, the high-side fet turns off and the synchronous rectifierturns on. this lowers the duty cycle and causes the out- put voltage to droop as long as the load current remains excessive. there is also a synchronous rectifier current limit of -0.85a when the device is operating in forced pwm mode (see the forced pwm operation sec- tion). if the negative current limit is exceeded, the syn- chronus rectifier is turned off, and the inductor currentcontinues to flow through its body diode until the begin- ning of the next cycle or the inductor current drops to zero. this means there is a limit on how much current the device is allowed to shuttle in response to output power reduction. normal mode operation connecting skip to gnd enables max1820/max1821 normal operation (figure 3). this allows automatic pwmcontrol at medium and heavy loads and skip mode at light loads to improve efficiency and reduce quiescent current to 180?. operating in normal mode also allows the max1820/max1821 to pulse skip when the peak inductor current drops below 130ma, corresponding to a load current of approximately 65ma. during skip operation, the max1820/max1821 switch only as needed to service the load, reducing the switching frequency and associated losses in the inter- nal switch, the synchronous rectifier, and the external inductor. there are three steady-state operating conditions forthe max1820/max1821 in normal mode. the device performs in continuous conduction for heavy loads in a manner identical to forced pwm mode. the inductor current becomes discontinuous at medium loads, requiring the synchronous rectifier to be turned off before the end of a cycle as the inductor current reach- es zero. the device enters into skip mode when the converter output voltage exceeds its regulation limit before the inductor current reaches its skip thres- hold level. during skip mode, a switching cycle initiates when the output voltage has dropped out of regulation. the p- channel mosfet switch turns on and conducts current to the output-filter capacitor and load until the inductor current reaches the skip peak current limit. then the main switch turns off, and the magnetic field in the inductor collapses, while current flows through the syn- chronous rectifier to the output filter capacitor and the load. the synchronous rectifier is turned off when the inductor current reaches zero. the max1820/ max1821 wait until the skip comparator senses a low output volt- age again. forced pwm operation connect skip to batt for forced pwm operation. forced pwm operation is desirable in sensitive rf anddata-acquisition applications to ensure that switching harmonics do not interfere with sensitive if and data- sampling frequencies. a minimum load is not required during forced pwm operation since the synchronous rectifier passes reverse-inductor current as needed to allow constant-frequency operation with no load. batt lx pgnd fb comp syncref skip gnd shdn r16k ? r c 82k ? c1330pf r230k ? 4.7 h 4.7 f 0.047 f v in = 2.6v to 5.5v * can be omitted if ceramic output capacitor is used. v out = 1.5v c2*1pf max1821 10 f0 . 1 f figure 3. standard operating circuit downloaded from: http:///
max1820/max1821 wcdma cellular phone 600mabuck regulators 12 ______________________________________________________________________________________ forced pwm operation uses higher supply current withno load (3.3ma typ) compared to skip mode. 100% duty-cycle operation the on-time can exceed one internal oscillator cycle,which permits operation up to 100% duty cycle. as the input voltage drops, the duty cycle increases until the p-channel mosfet is held on continuously. dropout voltage in 100% duty cycle is the output current multi- plied by the on-resistance of the internal switch and inductor, approximately 150mv (i out = 600ma). near dropout, the on-time may exceed one pwm clockcycle; therefore, small-amplitude subharmonic ripple may occur. comp clamp the max1820/max1821 compensation network has a0.45v to 2.15v error regulation range. the clamp pre- vents comp from rising too high or falling too low to optimize transient response. dropout dropout occurs when the input voltage is less than thedesired output voltage plus the ir drops in the circuit components. the duty cycle is 100% during this condi- tion, and the main switch remains on, continuously delivering current to the output up to the current limit. ir drops in the circuit are primarily caused by the on- resistance of the main switch and the resistance in the inductor. during dropout, the high-side p-channel mosfet turns on, and the controller enters a low-current consumption mode. every 6? (6 cycles), the max1820/max1821 check to see if the device is still in dropout. the device remains in this mode until the max1820/max1821 are no longer in dropout. undervoltage lockout (uvlo) the max1820/max1821 do not operate with batteryvoltages below the uvlo threshold of 2.35v (typ). the batt input remains high impedance until the supply voltage exceeds the uvlo threshold. this guarantees the integrity of the output voltage regulation and pre- vents excessive current during startup and as the bat- tery supply voltage drops during usage. synchronous rectification an n-channel synchronous rectifier eliminates the needfor an external schottky diode and improves efficiency. the synchronous rectifier turns on during the second half of each cycle (off-time). during this time, the volt- age across the inductor is reversed, and the inductor current falls. in normal mode, the synchronous rectifieris turned off when either the output falls out of regula- tion (and another on-time begins) or when the inductor current approaches zero. in forced pwm mode, the synchronous rectifier remains active until the beginning of a new cycle. sync input and frequency control the max1820z and max1821 internal oscillator is setto a fixed 1mhz switching frequency. the max1820z and max1821 do not have synchronizing capability and the sync pin must be connected to gnd. the max1820y, max1820x, and max1821x are capable of synchronizing to external signals. for external synchro- nization, drive the sync pin with a 13mhz (max1820x and max1821x) or 19.8mhz (max1820y) ac-coupled sine wave. sync has a perfect 13:1 (max1820x and max1821x) or 18:1 (max1820y) clock divider for 1mhz (max1820x and max1821x) or 1.1mhz (max1820y) switching from common system clocks. the input fre- quency range for sync is 10mhz to 16mhz (max1820x, max1821x) or 15mhz to 21mhz (max1820y). connect sync to gnd to use the internal free-running oscillator at 1mhz. shutdown mode drive shdn to gnd to place the max1820/max1821 in shutdown mode. in shutdown, the reference, controlcircuitry, internal switching mosfet, and the synchro- nous rectifier turn off, reducing the supply current to 0.1?, and the output goes high impedance. connect shdn to batt for normal operation. current-sense comparators the max1820/max1821 use several internal current-sense comparators. in pwm operation, the pwm com- parator terminates the cycle-by-cycle on-time (figures 1 and 2) and provides improved load and line response. this allows tighter specification of the induc- tor-saturation current limit to reduce inductor cost. a second current-sense comparator used across the p- channel switch controls entry into skip mode. a third current-sense comparator monitors current through the internal n-channel mosfet to prevent excessive reverse currents and determine when to turn off the synchronous rectifier. a fourth comparator used at the p-channel mosfet detects overcurrent. this protects the system, external components, and internal mosfets under overload conditions. downloaded from: http:///
max1820/max1821 wcdma cellular phone 600ma buck regulators ______________________________________________________________________________________ 13 applications information setting the output voltage (max1820) the max1820 is optimized for highest system efficiencywhen applying power to a linear pa in wcdma hand- sets. when transmitting at less than full power, the sup- ply voltage to the pa is reduced (from 3.4v to as low as 0.4v) to greatly reduce battery current. figure 4 shows the typical wcdma pa load profile. the use of a dc- dc converter such as the max1820 dramatically reduces battery drain in these applications. the max1820? output voltage is dynamically adjustable from 0.4v to v batt by the use of the ref input. the gain from v ref to v out is internally set to 1.76. v out can be adjusted during operation by driving ref with an external dac. the max1820 outputresponds to full-scale change in voltage and current in <30?. setting the output voltage (max1821) the max1821 is intended for general-purpose step-down applications where high efficiency is a priority. select an output voltage between 1.25v and v batt by connecting fb to a resistive divider between the outputand gnd (figure 3). select feedback resistor r2 in the 5k ? to 30k ? range. r1 is then given by: where v fb = 1.25v. compensation and stability the max1820/max1821 are externally compensatedby placing a resistor and a capacitor (r c and c1) in series, from comp to gnd (figure 3). the capacitorintegrates the current from the transimpedance amplifi- er, averaging output capacitor ripple. this sets the device speed for transient responses and allows the use of small ceramic output capacitors because the phase-shifted capacitor ripple does not disturb the cur- rent regulation loop. the resistor sets the proportional gain of the output error voltage by a factor g m ? r c . increasing this resistor also increases the sensitivity ofthe control loop to the output capacitor ripple. this resistor and capacitor set a compensation zero that defines the system? transient response. the load pole is a dynamic pole, shifting the pole frequency with changes in load. as the load decreases, the pole fre- quency shifts to the left. system stability requires that the compensation zero must be placed properly to ensure adequate phase margin (at least 30 at unity gain). the following is a design procedure for the com- pensation network: 1) select an appropriate converter bandwidth (f c ) to stabilize the system while maximizing transientresponse. this bandwidth should not exceed 1/5 of the switching frequency. use 100khz as a reason- able starting point. 2) calculate the compensation capacitor, c1, based on this bandwidth: resistors r1 and r2 are internal to the max1820; user1 = 151k ? and r2 = 199k ? as nominal values for cal- culations. these resistors are external to the max1821(see the setting the output voltage section). using v omax = 3.4v, i omax = 0.6a, g m = 50?, r cs = 0.75 ? , c1 is evaluated as:tion 3 selecting the nearest standard value of 330pf corre- sponds to a 103khz bandwidth, which is still accept- able per the above criteria. c1 3.4v 0.6a 1 0 50 s 1 151k +199k 1 23 = 341pf = ?? ? ?? ? ?? ? ?? ? ?? ? ?? ? ?? ? ?? ? . . 75 99 14 100 ? ? ?? k khz c1 v i 1 r g r2 r1+r2 1 2 o(max) o(max) cs m c = ?? ? ?? ? ?? ? ?? ? ?? ? ?? ? ?? ? ?? ? f r1 v v - out fb = ?? ? ?? ? r2 1 30 600 wcdma pa supply current (ma) 300 0.4 1.0 3.0 3.4 wcdma pa supply voltage (v) figure 4. typical wcdma pa load profile downloaded from: http:///
max1820/max1821 wcdma cellular phone 600mabuck regulators 14 ______________________________________________________________________________________ 3) calculate the equivalent load impedance, r l , by: 4) calculate the compensation resistance (r c ) value to cancel out the dominant pole created by the outputload and the output capacitance: solving for r c gives: 5) calculate the high-frequency compensation pole to cancel the zero created by the output capacitor?equivalent series resistance (esr): solving for c2 gives: in this case, c2 can be omitted due to the use ofceramic capacitors. larger output capacitors and high- er esr may require the use of capacitor c2. inductor selection a 4? to 6? inductor with a saturation current of atleast 800ma is recommended for most applications. for best efficiency, the inductor? dc resistance should be <200m ? , and saturation current should be >1a. see table 1 for recommended inductors and manufacturers. for most designs, a reasonable inductor value (l ideal ) can be derived from the following equation:where lir is the inductor current ripple as a percentage. lir should be kept between 20% and 40% of the maxi- mum load current for best performance and stability. the maximum inductor current is: the inductor current becomes discontinuous if i out decreases to lir/2 from the output current value usedto determine l ideal . input capacitor selection the input capacitor reduces the current peaks drawnfrom the battery or input power source and reduces switching noise in the ic. the impedance of the input capacitor at the switching frequency should be less than that of the input source so high-frequency switch- ing currents do not pass through the input source. the input capacitor must meet the ripple-current requirement (i rms ) imposed by the switching currents. nontantalum chemistries (ceramic, poscap, or os-con) are preferred due to their resistance to power-up surge currents: for optimal circuit reliability, choose a capacitor that has less than 10? temperature rise at the peak ripple current. i v(v -v) v rms load out batt out batt = ?? ?? ?? ?? i ii l(max) out(max) =+ ?? ? ?? ? 1 2 lir l v( v -v) v ideal out batt out batt out(max) osc = ? lir i c rc rk pf 2 3 001 80 8 055 = = = esr out 4.7 f . . . ? ? 1 2 1 2 esr out = rc rc 32 ` r c r c1 3.4v 0.6a 4.7 = 80.8k l out = = ?? ? ?? ? ?? ? ?? ? cf pf 330 ? 1 2 1 2 l out c = rc r c1 r l v i out(max) out(max) table 1. suggested inductors manufacturer part number inductance (?) esr (m ? ) saturationcurrent (a) dimensions (mm) coilcraft do1606 4.7 120 1.2 5.3 ? 5.3 ? 2.0 coilcraft lpt1606-472 4.7 240 (max) 1.2 6.5 ? 5.3 ? 2.0 sumida cdrh4d18-4r7 4.7 125 0.84 5 ? 5 ? 2 sumida cr43 4.7 108.7 1.15 4.5 ? 4.0 ? 3.5 sumida cdrh5d18-4r1 4.1 57 1.95 5.5 ? 5.5 ? 2.0 downloaded from: http:///
max1820/max1821 wcdma cellular phone 600ma buck regulators ______________________________________________________________________________________ 15 output capacitor selection the output capacitor is required to keep the output volt-age ripple small and to ensure regulation control loop stability. the output capacitor must have low imped- ance at the switching frequency. ceramic capacitors are recommended. the output ripple is approximately: v ripple lir ? i out(max) see the compensation design section for a discussion of the influence of output capacitance and esr on reg-ulation control-loop stability. the capacitor voltage rating must exceed the maximum applied capacitor voltage. consult the manufacturer? specifications for proper capacitor derating. avoid y5v and z5u dielectric types due to their huge voltage and temperature coefficients of capacitance and esr. pc board layout and routing high switching frequencies and large peak currentsmake pc board layout a very important part of design. good design minimizes excessive emi on the feedback paths and voltage gradients in the ground plane, both of which can result in instability or regulation errors. connect the inductor, input filter capacitor, and output filter capacitor as close together as possible, and keep their traces short, direct, and wide. connect their ground pins at a single common node in a star-ground configuration. the external voltage-feedback network should be very close to the fb pin, within 0.2in (5mm). keep noisy traces (from the lx pin, for example) away from the voltage-feedback network; also, keep them separate, using grounded copper. connect gnd and pgnd at a single point, as close as possible to the max1820/max1821. the max1820/max1821 evalua- tion kit manual illustrates an example pc board layout and routing scheme. ucsp package consideration for general ucsp package information and pc layoutconsiderations, refer to the maxim application note (wafer-level ultra-chip-board-scale package). ______________ ________ ucsp reliability the chip-scale package (ucsp) represents a uniquepackaging form factor that may not perform equally to a packaged product through traditional mechanical relia- bility tests. ucsp reliability is integrally linked to the user? assembly methods, circuit board material, and usage environment. the user should closely review these areas when considering use of a ucsp package. performance through operating life test and moisture resistance remains uncompromised as it is primarily determined by the wafer-fabrication process. mechanical stress performance is a greater considera- tion for a ucsp package. ucsps are attached through direct solder contact to the user? pc board, foregoing the inherent stress relief of a packaged-product lead frame. solder joint contact integrity must be consid- ered. information on maxim? qualification plan, test data, and recommendations are detailed in the ucsp application note, which can be found on maxim? website, www.maxim-ic.com. ____________________chip information transistor count: 2722 + ? () ?? ?? ?? ?? esr c osc out 1 2 table 2. capacitor selection capacitor capacitor value (f) esr (m ? ) capacitor type c batt 4.7 to 10 <150 ceramic c out (max1820) 2.2 to 4.7 <50 ceramic c out (max1821) 4.7 to 10 <150 ceramic table 3. component manufacturers manufacturer usa phone number website coilcraft 847-639-6400 www.coilcraft.com kemet 408-986-0424 www.kemet.com panasonic 847-468-5624 w w w .p anasoni c.com sumida 847-956-0666 www.sumida.com taiyo yuden 408-573-4150 www.t-yuden.com downloaded from: http:///
max1820/max1821 wcdma cellular phone 600mabuck regulators 16 ______________________________________________________________________________________ sync gnd shdn batt pgnd comp ref lx fb max1821 skip input 2.6v to 5.5v output 1.25v to 5.5v typical operating circuits (continued) 1 23 4 5 10 98 7 6 syncbatt lx ref ( ) are for max1821 only. out (fb) comp skip max1820max1821 max top view pgnd gnd shdn comp out (fb) sync batt lx ucsp top view after assembled on pc board (bumps at the bottom) ( ) are for max1821 only. a1 a3 a2 b1 c1 c2 c3 ab c 1 2 3 gnd pgnd a4 b4 c4 4 ref skip shdn pin configurations ordering information (continued) part sync freq (mhz) output voltage temp range pin-package ucsp mark max1821 ebc* no sync programmable -40? to +85? 3 ? 4 ucsp aac max1821eub no sync programmable -40? to +85? 10 ?ax max1821xebc* 13 programmable -40? to +85? 3 ? 4 ucsp aav max1821xeub 13 programmable -40? to +85? 10 ?ax *ucsp reliability is integrally linked to the user? assembly methods, circuit board material, and environment. refer to the ucsp reliability notice in the ucsp reliability section for more information. downloaded from: http:///
max1820/max1821 wcdma cellular phone 600ma buck regulators ______________________________________________________________________________________ 17 12l, ucsp 4x3.eps f 1 1 21-0104 package outline, 4x3 ucsp package information (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline information, go to www.maxim-ic.com/packages .) downloaded from: http:///
max1820/max1821 wcdma cellular phone 600mabuck regulators maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circuit patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 18 ____________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 2005 maxim integrated products printed usa is a registered trademark of maxim integrated products, inc . package information (continued) (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline information, go to www.maxim-ic.com/packages .) 10lumax.eps package outline, 10l umax/usop 1 1 21-0061 i rev. document control no. approval proprietary information title: top view front view 1 0.498 ref 0.0196 ref s 6 side view bottom view 0 0 6 0.037 ref 0.0078 max 0.006 0.043 0.118 0.120 0.199 0.0275 0.118 0.0106 0.120 0.0197 bsc inches 1 10 l1 0.0035 0.007 e c b 0.187 0.0157 0.114 h l e2 dim 0.116 0.114 0.116 0.002 d2 e1 a1 d1 min - a 0.940 ref 0.500 bsc 0.090 0.177 4.75 2.89 0.40 0.200 0.270 5.05 0.70 3.00 millimeters 0.05 2.89 2.95 2.95 - min 3.00 3.05 0.15 3.05 max 1.10 10 0.60.1 0.60.1 0.500.1 h 4x s e d2 d1 b a2 a e2 e1 l l1 c gage plane a2 0.030 0.037 0.75 0.95 a1 downloaded from: http:///

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